/*
 * Copyright (c) Huawei Technologies Co., Ltd. 2018-2019.
 * Description: support HITIMERV130 in SD6157
 * Author: qiuguorui <qiuguorui1@huawei.com>
 * Create: 2018-09-26
 */

#include <linux/clk.h>
#include <linux/clocksource.h>
#include <linux/clockchips.h>
#include <linux/err.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/sched_clock.h>

#include "timer-hitimer.h"

static long __init hitimer_get_clock_rate(struct clk *clk, const char *name)
{
	return sp804_get_clock_rate(clk);
}

static void __iomem *sched_clock_base;

static u64 hitimer_counter_read(void)
{
	u64 counter;
	u32 lower;
	u32 upper, old_upper;

	upper = readl_relaxed(sched_clock_base + REG_HITIMER_VALUE_H);
	do {
		old_upper = upper;
		lower = readl_relaxed(sched_clock_base + REG_HITIMER_VALUE_L);
		upper = readl_relaxed(sched_clock_base + REG_HITIMER_VALUE_H);
	} while (upper != old_upper);

	counter = upper;
	counter <<= 32;
	counter |= lower;
	return ~counter;
}

static u64 hitimer_clocksource_read(struct clocksource *cs)
{
	return hitimer_counter_read();
}

static u64 notrace hitimer_sched_clock_read(void)
{
	return hitimer_counter_read();
}

static struct clocksource hitimer_clocksource = {
	.name	= "hitimer",
	.rating	= 300,
	.read	= hitimer_clocksource_read,
	.mask	= CLOCKSOURCE_MASK(64),
	.flags	= CLOCK_SOURCE_IS_CONTINUOUS,
};


void __init __hitimer_clocksource_and_sched_clock_init(void __iomem *base,
						     const char *name,
						     struct clk *clk,
						     int use_sched_clock)
{
	long rate;

	if (!clk) {
		clk = clk_get_sys("hitimer", name);
		if (IS_ERR(clk)) {
			pr_err("hitimer: clock not found: %d\n",
			       (int)PTR_ERR(clk));
			return;
		}
	}

	rate = hitimer_get_clock_rate(clk, name);

	if (rate < 0)
		return;

	writel(0, base + REG_HITIMER_CONTROL);
	writel(0xffffffff, base + REG_HITIMER_RELOAD_L);
	writel(0xffffffff, base + REG_HITIMER_RELOAD_H);
	writel(HITIMER_CTRL_ENABLE | HITIMER_CTRL_PERIODIC | HITIMER_DISABLE_IRQ,
		base + REG_HITIMER_CONTROL);

	sched_clock_base = base;

	clocksource_register_hz(&hitimer_clocksource, rate);

	if (use_sched_clock) {
		sched_clock_register(hitimer_sched_clock_read, 64, rate);
	}
}

static void __iomem *clkevt_base;
static unsigned long clkevt_reload;
static bool clear_hitimer_irq;

/*
 * IRQ handler for the timer
 */
static irqreturn_t hitimer_timer_interrupt(int irq, void *dev_id)
{
	struct clock_event_device *evt = dev_id;

	if (clear_hitimer_irq)
		writel(HITIMER_INT_CLEAR, clkevt_base + REG_HITIMER_INTCLR);

	evt->event_handler(evt);

	return IRQ_HANDLED;
}

static void hitimer_set_mode(enum clock_event_mode mode,
	struct clock_event_device *evt)
{
	unsigned long ctrl = HITIMER_CTRL_DISABLE;

	writel(ctrl, clkevt_base + REG_HITIMER_CONTROL);

	switch (mode) {
	case CLOCK_EVT_MODE_PERIODIC:
		writel(clkevt_reload, clkevt_base + REG_HITIMER_RELOAD_L);
		ctrl = HITIMER_CTRL_PERIODIC | HITIMER_CTRL_ENABLE | HITIMER_ENABLE_IRQ;
		break;

	case CLOCK_EVT_MODE_ONESHOT:
		/* period set, and timer enabled in 'next_event' hook */
		ctrl = HITIMER_CTRL_ONSHOT | HITIMER_ENABLE_IRQ;
		break;

	case CLOCK_EVT_MODE_UNUSED:
	case CLOCK_EVT_MODE_SHUTDOWN:
	default:
		break;
	}

	writel(ctrl, clkevt_base + REG_HITIMER_CONTROL);
}

static int hitimer_shutdown(struct clock_event_device *evt)
{
	hitimer_set_mode(CLOCK_EVT_MODE_SHUTDOWN, evt);

	return 0;
}

static int hitimer_set_periodic(struct clock_event_device *evt)
{
	hitimer_set_mode(CLOCK_EVT_MODE_PERIODIC, evt);

	return 0;
}

static int hitimer_set_oneshot(struct clock_event_device *evt)
{
	hitimer_set_mode(CLOCK_EVT_MODE_ONESHOT, evt);

	return 0;
}

static int hitimer_set_next_event(unsigned long next,
	struct clock_event_device *evt)
{
	unsigned long ctrl = readl(clkevt_base + REG_HITIMER_CONTROL);

	writel(next, clkevt_base + REG_HITIMER_RELOAD_L);
	writel(ctrl | HITIMER_CTRL_ENABLE, clkevt_base + REG_HITIMER_CONTROL);

	return 0;
}

static struct clock_event_device hitimer_clockevent = {
	.features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT |
		CLOCK_EVT_FEAT_DYNIRQ,
	.set_state_shutdown	= hitimer_shutdown,
	.set_state_periodic	= hitimer_set_periodic,
	.set_state_oneshot	= hitimer_set_oneshot,
	.tick_resume	= hitimer_shutdown,
	.set_next_event	= hitimer_set_next_event,
	.rating		= 300,
};

/*
 * In SD6157, a driver will use hitimer irq for mailbox commucation, so they
 * will free this irq in their own module.
 * Devid will be required when freeing hitimer irq(during init we use devid
 * to request this irq), but devid can not be exported, so we need to
 * export a free hitimer irq function.
 * This function only used for SD6157, when this board EOL, remove this function.
 */
void free_hitimer_irq(void)
{
	if (hitimer_clockevent.irq == 0) {
		pr_err("hitimer irq is not registered!\n");
		return;
	}

	free_irq(hitimer_clockevent.irq, &hitimer_clockevent);
}
EXPORT_SYMBOL(free_hitimer_irq);

void __init __hitimer_clockevents_init(void __iomem *base, unsigned int irq, struct clk *clk, const char *name)
{
	struct clock_event_device *evt = &hitimer_clockevent;
	long rate;

	if (!clk)
		clk = clk_get_sys("hitimer", name);
	if (IS_ERR(clk)) {
		pr_err("hitimer: %s clock not found: %d\n", name,
			(int)PTR_ERR(clk));
		return;
	}

	rate = hitimer_get_clock_rate(clk, name);
	if (rate < 0)
		return;

	clkevt_base = base;
	clkevt_reload = DIV_ROUND_CLOSEST(rate, HZ);
	evt->name = name;
	evt->irq = irq;
	evt->cpumask = cpu_possible_mask;

	writel(HITIMER_CTRL_DISABLE, base + REG_HITIMER_CONTROL);

	if (request_irq(irq, hitimer_timer_interrupt, IRQF_TIMER | IRQF_IRQPOLL,
			"hitimer", &hitimer_clockevent))
		pr_err("%s: request_irq() failed\n", "hitimer");
	clockevents_config_and_register(evt, rate, 0xf, 0xffffffff);
}

static int __init hitimer_of_init(struct device_node *np)
{
	static bool initialized;
	void __iomem *clk_event_base = NULL;
	void __iomem *clk_source_base = NULL;
	int irq;
	struct clk *clk1 = NULL;
	struct clk *clk2 = NULL;
	const char *name = of_get_property(np, "compatible", NULL);

	clk_event_base = of_iomap(np, 0);
	if (WARN_ON(!clk_event_base))
		return -ENXIO;

	clk_source_base = of_iomap(np, 1);
	if (WARN_ON(!clk_source_base))
		goto err;

	/* Ensure timers are disabled */
	writel(HITIMER_CTRL_DISABLE, clk_event_base + REG_HITIMER_CONTROL);
	writel(HITIMER_CTRL_DISABLE, clk_source_base + REG_HITIMER_CONTROL);

	if (initialized || !of_device_is_available(np))
		goto err;

	clk1 = of_clk_get(np, 0);
	if (IS_ERR(clk1))
		clk1 = NULL;

	if (of_count_phandle_with_args(np, "clocks", "#clock-cells") == 2) {
		clk2 = of_clk_get(np, 1);
		if (IS_ERR(clk2)) {
			pr_err("hitimer: %s clock not found: %d\n", np->name,
				(int)PTR_ERR(clk2));
			goto err;
		}
	} else
		clk2 = clk1;

	clear_hitimer_irq = false;
	if (of_property_read_bool(np, "clear-hitimer-irq")) {
		pr_info("find clear-hitimer-irq in dts\n");
		clear_hitimer_irq = true;
	}

	irq = irq_of_parse_and_map(np, 0);
	if (irq <= 0)
		goto err;

	__hitimer_clockevents_init(clk_event_base, irq, clk1, name);
	__hitimer_clocksource_and_sched_clock_init(clk_source_base,
							 name, clk2, 1);
	initialized = true;

	return 0;
err:
	if (clk_event_base)
		iounmap(clk_event_base);
	if (clk_source_base)
		iounmap(clk_source_base);

	return -1;
}
TIMER_OF_DECLARE(hitimer, "arm,hitimer", hitimer_of_init);
